C-NNAP: An Architecture for the Parallel Processing of Binary Neural Networks

This paper describes the C-NNAP machine, a MIMD implementation of an array of ADAM binary neural networks, primarily designed for image processing. C-NNAP comprises an array of VME cards each containing a DSP, SCSI controller and the SAT peripheral processor. The SAT processor is a dedicated hardware implementation that performs binary neural network computations. The SAT processor yields a speed-up of greater than 180 times over the current DSP with its dedicated coprocessor. C-NNAP in association with the SAT processor provide a fast, parallel environment for performing binary neural network operations.